AA+ Chipset

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The AA+ chipset was a planned Amiga-compatible chipset that Commodore International announced in 1992. There were two separate projects: the next generation Advanced Amiga Architecture chipset and the lower cost, more pragmatic AA+ chipset. The former was in development when Commodore declared bankruptcy; the latter existed only on paper. Both were cancelled when Commodore folded.

History[edit]

In 1991 Commodore realized that AAA cost was going high, so they postponed it until 1994 and hesitantly designed AGA and released it in 1992 to keep up with the competitors.

Commodore was convinced that even in 1994 AAA systems with their four custom chips (six chips in the 64-bit systems) would be very expensive to use in a low price A1200 like computer or CD32 like console. So unlike Commodore's habit of designing one custom chip for both high end and low end computers to save development costs, Commodore decided to design two custom chips: AAA for the high end computers and AA+ for the low end ones.

In January 1993 at Devcon in Orlando, Florida, Lew Eggebrecht Commodore VP of Engineering at the time stated the following:

"AA+ will be a more profitable version of AA with all the things we wished we'd got in but didn't have time. We have a list of all the problems we currently have at the low end. The serial port, we can't read high density floppies, there isn't enough band width to do 72 Hz screens plus there are no chunky pixel modes for rendering. We listed all those and said, "OK let's go out and fix them as quickly as we can", so AA+ is an extension, not radically new architecture. We're doing the best that we can, taking advantage of advances in technology, significantly reducing the cost and that's the goal."

According to Dave Haynie AA+ only existed on papers and the actual design never started due to Commodore's lack of money at the time. Like AAA and Hombre, Commodore was planning to use AA+ with the Acutiator system that Haynie designed.

A few years later Access Innovations adopted the AA+ name for its BoXeR AGA compatible chipset.

Compatibility[edit]

Unlike AAA which was a radical design from ECS and did not support AGA registers, AA+ was built on the foundations of AGA and would be largely compatible with AGA.

Operating System[edit]

AA+ systems would be shipped with the forthcoming AmigaOS 4 which added RTG support for chunky pixels.

Chips[edit]

To keep costs down, Amiga custom chips would be reduced from 3 (OCS, ECS, AGA) to only two. AA+ would feature two custom chips with 160 - 280 pin packages and each chip would have 100,000 transistors on it. In comparison, AGA Lisa has 80,000 while ECS has a total of 60,000. On the other hand, AAA, with its 4 chips, would have a total count of 750,000 transistors, and more than 1,000,000 in its 6 chips 64-bit configuration.

CPU[edit]

Commodore stated that AA+ was designed to support ALL 32-bit 680x0 CPUs. For Chunky pixels support, low end systems would most likely feature a 68020 with full 32-bit memory addressing (i.e. not 68EC020) or even 68EC030 which could handle RTG drivers easily. Commodore did not add chunky pixels to AGA at the time because RTG required at least 68020 (not 68EC020 as in A1200) with 4 MB memory at least, while the standard A1200 had only 2 MB and 68EC020 CPU.

Memory[edit]

AA+ had 8x memory bandwidth over ECS by using 128-bit long memory bus bursts like AAA. Maximum Chip RAM size would be increased to 8 MB.

AA+ would use 60 ns DRAM, but AA+ systems would need at least 4 MB as a standard to support RTG and packed (Chunky) pixels, an A1200-like systems (e.g. A1400) would most likely be shipped with 8 MB which was the standard in 1994 for low end PCs.

Graphics[edit]

With 57 MHz pixel clock, AA+ could display progressive 800 x 600 @ 72 Hz in 256 colors, or even interlaced 1024 x 768 screens. Perhaps the most significant advancement was the addition of 16-bit Chunky mode, although the max resolution for 16-bit pixels would be 640 x 480.

There is no mention of 8-bit chunky mode in AA+, most likely 256 colors would be only in planar mode, this way Commodore could keep the cost of AA+ down, as 8-bit planar support had to remain, since it was supported in AGA.

Blitter[edit]

A 2x blitter performance over AGA/ECS one was promised, however Commodore never mentioned that AA+ had 32-bit blitter like AAA, so AA+ blitter would stay 16-bit to keep the cost down. A 2X performance might be gained by increasing blitter clock cycle from 7 MHz to 14 MHz, but by doing this AA+ will lose compatibility with a large base of hardware banging software which depend on synchronizing with blitter cycles like most demos and games of that era.

Sound[edit]

When asked, Lew Eggebrecht VP of Engineering at Commodore stated that AA+ will support 16-bit sound samples, but it is unclear whether this support would be added by adding a DSP chip, or by improving Paula to something better like AAA, although Lew Eggebrecht stated once that DSP will be integrated in all future Amiga chipsets including the low end ones.

Floppy[edit]

AA+ would fully support 1.76 MB HD floppy drives at full speed without using workaround kludges like former Amigas, former Amiga HD floppy drives had to be specially made drives that could spin at half the speed of standard HD floppy drives to cope with Paula's lack of support of higher bit rates.

Serial Port[edit]

AA+ would have two four-byte buffered FIFO serial UARTs like the AAA.

Specifications[edit]

  • Two Chips with 100k Transistor each.
  • Synchronous to video clock.
  • 160 - 280 pin packages.
  • 32 bit DRAM 60 ns Page Mode Chip Memory.
  • 57 MHz pixel clock.
  • 256 colors planar mode with AGA registers compatibility.
  • 4 MB 4 Mbit/s Floppy Controller with Hardware CRC floppy drives using standard technology.
  • Support for ALL 32 bit 680x0 CPUs.
  • 8x memory bandwidth increase over ECS.
  • 2x Blitter Performance (gets twice as many clocks as on AGA).
  • Rock steady 800 x 600 x 8-bit Non-Interlace 72 Hz refresh rate, Larger screens at lower refresh rates.
  • packed (Chunky) 16-bit color mode
  • FIFO serial ports with large buffer.
  • Increased chip ram limit up to 8 MB.

See also[edit]

References[edit]

External links[edit]