Core Multiplexing Technology
 | This article's factual accuracy may be compromised due to out-of-date information. (November 2010) |
Core Multiplexing Technology is a term that appeared in some BIOSes.
Details[edit]
A subset of traditional applications are often difficult to parallelize and make use of additional CPU hardware available on the platform, restraining applications to use only one CPU. Core Multiplexing Technology would allow for a process to be split into multiple threads at compilation time and execution time by the introduction of speculative multithreading.
Much in the same way a branch predictor allows for a processor to speculate on the outcome of a branch operation without actually performing the operation, speculative multithreading allows for the processor to speculate deeper, executing entire branches of code on an additional core. Most of the implementation is done in software, with the compiler rearranging code to take better use of a multithreaded platform, which allows Simultaneous multithreading (SMT) and Multicore systems (or a combination of the two) to take advantage of the technology. But, because the data dependencies of speculative multithreading, and the necessity to manage inter-thread dependent data, hardware implementation must be taken into consideration.
Core Multiplexing Technology is thought to leverage Intel's Advanced Smart Cache technology of the upcoming Core 2 chips, which allows two cores to share a single L2 cache, and actively resize the cache between the two processors if one is idle, by allowing the two cores to share data to manage inter-thread dependent data.
See also[edit]
External Resources[edit]
 | This computer hardware article is a stub. You can help Wikipedia by expanding it. |