File:Cascaded-AND-OR-diode-logic.svg
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Summary
| Description |
English: In cascaded AND-OR diode gates, the high voltage level is decreased at least twice. First, the AND gate pull-ups are source resistance for the second stage, thus froming a voltage divider. Second, the OR gate diodes drop the input by VF. |
| Date | |
| Source | Own work |
| Author | Em3rgent0rdr |
Licensing
I, the copyright holder of this work, hereby publish it under the following license:
 
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This file is made available under the Creative Commons CC0 1.0 Universal Public Domain Dedication. |
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File history
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| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 06:24, 16 January 2023 | | 120 × 110 (12 KB) | Em3rgent0rdr | trimmed cropping |
| 06:13, 16 January 2023 |  | 380 × 317 (15 KB) | Em3rgent0rdr | Uploaded own work with UploadWizard |
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