File:FPGA cell example.png
Size of this preview: 799 × 359 pixels. Other resolutions: 320 × 144 pixels | 957 × 430 pixels.
Original file (957 × 430 pixels, file size: 7 KB, MIME type: image/png)
 | This is a file from the Wikimedia Commons. Information from its description page there is shown below. Commons is a freely licensed media file repository. You can help. |
Summary
| Description |
English: An example of how an FPGA logic cell can look like, incl a 4 inp. LUT (or two 3-LUTs), a Full Adder and a D-type Flip Flop. The 2 muxes to the right have their select signal set during the programming of the cell.
Svenska: Exempel på hur en logisk cell i en FPGA kan vara uppbyggd, inkl. en 4-LUT (eller två 3-LUTar), en Fulladderare och en D-flip-flop. De två muxarna till höger får sina select-signaler satta vid programmeringen av cellen. |
| Date | |
| Source | Own work |
| Author | Petter.kallstrom |
|
This technology image could be re-created using vector graphics as an SVG file. This has several advantages; see Commons:Media for cleanup for more information. If an SVG form of this image is available, please upload it and afterwards replace this template with
{{vector version available|new image name}}.
It is recommended to name the SVG file “FPGA cell example.svg”—then the template Vector version available (or Vva) does not need the new image name parameter. |
Licensing
|
I, the copyright holder of this work, release this work into the public domain. This applies worldwide. In some countries this may not be legally possible; if so: I grant anyone the right to use this work for any purpose, without any conditions, unless such conditions are required by law. |
File history
Click on a date/time to view the file as it appeared at that time.
| Date/Time | Thumbnail | Dimensions | User | Comment | |
|---|---|---|---|---|---|
| current | 17:20, 2 May 2010 | | 957 × 430 (7 KB) | Petter.kallstrom | {{Information |Description={{en|1=An example of how an FPGA logic cell can look like, incl a 4 inp. LUT (or two 3-LUTs), a Full Adder and a D-type Flip Flop. The 2 muxes to the right have their select signal set during the programming of the cell.}} {{sv| |
File usage
The following pages on the English Wikipedia use this file (pages on other projects are not listed):
Global file usage
The following other wikis use this file:
- Usage on cs.wikipedia.org
- Usage on de.wikipedia.org
- Usage on et.wikipedia.org
- Usage on eu.wikipedia.org
- Usage on hu.wikipedia.org
- Usage on it.wikipedia.org
- Usage on ja.wikipedia.org
- Usage on simple.wikipedia.org
- Usage on sr.wikipedia.org
- Usage on sv.wikipedia.org
