File:Intel 8086 block scheme.svg

Page contents not supported in other languages.
This is a file from the Wikimedia Commons
From Wikipedia, the free encyclopedia

Original file(SVG file, nominally 800 × 650 pixels, file size: 40 KB)

Summary

Description
English: Block diagram of the Intel 8086 microprocessor 1. Block of general purpose registers, 2 Block segment registers, 3 20 BIT combiner, 4 Internal bus C, 5 Queue commands, 6 The control system, 7 The control system bus, 8 Internal Bus A, 9 Arithmetic logic unit (ALU), 10 Address bus, 11 Data bus, 12 Rail Control F. Registry tags, AX -accumulator , BX - register base CX - counting register, DX - data register, SP - stack pointer, BP - base pointer, SI - source index, DI - Destination Index ,CS - code Segment DS - data segment, SS - stack segment, ES - extra segment, IP - Instruction Pointer.
Français : Diagramme des blocs du microprocesseur Intel 8086 :
  • 1 Bloc des registres généraux,
  • 2 Bloc des registres de segment,
  • 3 Additionneur 20 bits,
  • 4 Bus interne C,
  • 5 Commandes de file,
  • 6 Système de contrôle,
  • 7 Bus système de contrôle,
  • 8 Bus interne A,
  • 9 Unité logique et arithmétique (ALU : Arithmetic logic unit),
  • 10 Bus d'adresse,
  • 11 Bus de données,
  • 12 Signaux de contrôle,
  • AX - Accumulateur,
  • BX - Registre de base,
  • CX - Registre de compteur,
  • DX - Registre de donnée,
  • SP - Pointeur de pile,
  • BP - Pointeur de base,
  • SI - Index de source,
  • DI - Index de destination,
  • CS - Segment de code,
  • DS - Segment de données,
  • SS - Segment de pile,
  • ES - Segment supplémentaire,
  • IP - Pointeur d'instruction.
  • F - Registre d'indicateurs (Flags).
Polski: Schemat blokowy mikroprocesora Intel 8086. 1. Blok rejestrów ogólnego przeznaczenia, 2. Blok rejestrów segmentowych, 3. Dwudziestobitowy sumator, 4. Magistrala wewnętrzna C, 5. Kolejka rozkazów, 6. Układ sterowania, 7. Układ sterowania magistral, 8. Magistrala wewnętrzna A, 9. Jednostka Arytmetyczno-Logiczna (ALU), 10. Szyna adresowa, 11. Szyna danych, 12. Szyna sterowania, F. Rejestr znaczników, AX - akumulator, BX - rejestr bazowy, CX - rejestr zliczający, DX - rejestr danych, SP - wskaźnik stosu, BP - wskaźnik bazowy, SI - indeks źródła, DI - indeks celu, CS - segment kodu, DS - segment danych, SS - segment stosu, ES - segment dodatkowy, IP - wskaźnik rozkazów
Date
Source Własne opracowanie na podstawie różnych źródeł
Author Harkonnen2
This vector image has been made or improved in the Polish vector graphics project (grafiki wektorowe). You can propose images to improve as well.

English | македонски | polski | 中文 | 中文(简体)‎ | +/−

Licensing

I, Harkonnen2, the copyright holder of this work, hereby publishes it under the following licenses:
GNU head Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or any later version published by the Free Software Foundation; with no Invariant Sections, no Front-Cover Texts, and no Back-Cover Texts. A copy of the license is included in the section entitled GNU Free Documentation License.
w:en:Creative Commons
attribution share alike
This file is licensed under the Creative Commons Attribution-Share Alike 3.0 Unported license.
Attribution: I, Harkonnen2
You are free:
  • to share – to copy, distribute and transmit the work
  • to remix – to adapt the work
Under the following conditions:
  • attribution – You must give appropriate credit, provide a link to the license, and indicate if changes were made. You may do so in any reasonable manner, but not in any way that suggests the licensor endorses you or your use.
  • share alike – If you remix, transform, or build upon the material, you must distribute your contributions under the same or compatible license as the original.
This licensing tag was added to this file as part of the GFDL licensing update.
w:en:Creative Commons
attribution share alike
This file is licensed under the Creative Commons Attribution-Share Alike 2.5 Generic, 2.0 Generic and 1.0 Generic license.
Attribution: I, Harkonnen2
You are free:
  • to share – to copy, distribute and transmit the work
  • to remix – to adapt the work
Under the following conditions:
  • attribution – You must give appropriate credit, provide a link to the license, and indicate if changes were made. You may do so in any reasonable manner, but not in any way that suggests the licensor endorses you or your use.
  • share alike – If you remix, transform, or build upon the material, you must distribute your contributions under the same or compatible license as the original.
You may select the license of your choice.

Captions

Add a one-line explanation of what this file represents

Items portrayed in this file

depicts

24 June 2006

File history

Click on a date/time to view the file as it appeared at that time.

Date/TimeThumbnailDimensionsUserComment
current21:18, 24 June 2007Thumbnail for version as of 21:18, 24 June 2007800 × 650 (40 KB)Harkonnen2{{Information |Description=Schemat blokowy mikroprocesora Intel 8086. 1. Blok rejestrów roboczych, 2. Blok rejestrów segmentowych, 3. Dwudziestobitowy sumator, 4. Magistrala wewnętrzna C, 5. Kolejka rozkazów, 6. Układ sterowania, 7. Układ sterowania
The following pages on the English Wikipedia use this file (pages on other projects are not listed):

Global file usage

The following other wikis use this file: