MCST

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MCST
Company typeJoint-stock company
IndustryMicroprocessors
Founded1992; 32 years ago (1992)
FounderBoris Babayan
Headquarters,
Russia
Revenue$25 million[1] (2017)
$1.34 million[1] (2017)
$911,252[1] (2017)
Total assets$54 million[1] (2017)
Total equity$6.15 million (2017)
Websitewww.mcst.ru
MCST Elbrus HT-R1000 laptop at 2013 MAKS Airshow

MCST (Russian: МЦСТ, acronym for Moscow Center of SPARC Technologies) is a Russian microprocessor company that was set up in 1992.[2] Different types of processors made by MCST were used in personal computers, servers and computing systems. MCST develops microprocessors based on two different instruction set architecture (ISA): Elbrus and SPARC. MCST is a direct descendant of the Lebedev Institute of Precision Mechanics and Computer Engineering.[3]

MCST is the base organization of the Department of Informatics and Computer Engineering of the Moscow Institute of Physics and Technology.[4]

MCST develops the Elbrus processor architecture and the eponymous family of universal VLIW microprocessors based on it with the participation of INEUM [ru]. The name "Elbrus" has been given the backronym "ExpLicit Basic Resources Utilization Scheduling".[5]

Products[edit]

  • Elbrus 1 (1973) was the fourth generation Soviet computer, developed by Vsevolod Burtsev. Implements tag-based architecture and ALGOL as system language like the Burroughs large systems. A side development was an update of the 1965 BESM-6 as Elbrus-1K2.
  • Elbrus 2 (1977) was a 10-processor computer, considered the first Soviet supercomputer, with superscalar RISC processors. Re-implementation of the Elbrus 1 architecture with faster ECL chips.
  • Elbrus 3 (1986) was a 16-processor computer developed by Boris Babayan. Differing completely from the architecture of both Elbrus 1 and Elbrus 2, it employed a VLIW architecture.
  • Elbrus-90micro (1998–2010) is a computer line based on SPARC instruction set architecture (ISA) microprocessors: MCST R80, R150, R500, R500S, MCST-4R (MCST-R1000) and MCST-R2000 working at 80, 150, 500, 1000 and 2000 MHz.
  • Elbrus-3M1 (2005) is a two-processor computer based on the Elbrus 2000 microprocessor employing VLIW architecture working at 300 MHz. It is a further development of the Elbrus 3 (1986).
  • Elbrus МВ3S1/C (2009) is a ccNUMA 4-processor computer based on Elbrus-S microprocessor working at 500 MHz.
  • Elbrus-2S+ (2011) is a dual-core Elbrus 2000 based microprocessor working at 500 MHz, with capacity to calculate 16 GFlops.
  • Elbrus-2SM (2014) is a dual-core Elbrus 2000 based microprocessor working at 300 MHz, with capacity to calculate 9.6 GFlops.
  • Elbrus-4S (2014) is a quad-core Elbrus 2000 based microprocessor working at 800 MHz, with capacity to calculate 50 GFlops.
  • Elbrus-8S (2014–2015) is an octa-core Elbrus 2000 based microprocessor working at 1300 MHz, with capacity to calculate 250 GFlops.
  • Elbrus-8SV (2018) is an octa-core Elbrus 2000 based microprocessor working at 1500 MHz, with capacity to calculate 576 GFlops.
  • Elbrus-16S (2021) is 16-core Elbrus 2000 based microprocessor working at 2000 MHz, with capacity to calculate 750 GFlops at double precision and 1.5 TFlops at single precision operations.
  • Elbrus-32S (Sample production is planned in 2025) is a 32-core Elbrus 2000 based microprocessor working at 2500 MHz, with capacity to calculate 1.5 TFlops.[6]


See also[edit]

References[edit]

  1. ^ a b c d Error: Unable to display the reference properly. See the documentation for details.
  2. ^ "Russia's microelectronics industry gets steam". East-West Digital News. Retrieved 25 October 2017.
  3. ^ "О компании/20 лет МЦСТ". 20.mcst.ru. MCST. Retrieved 25 October 2017.
  4. ^ "Кафедра информатики и вычислительной техники — Базовые и факультетские кафедры". mipt.ru.
  5. ^ Bode, Arndt; Ludwig, Thomas; Karl, Wolfgang; Wismüller, Roland (2003-06-26). Euro-Par 2000 Parallel Processing: 6th International Euro-Par Conference Munich, Germany, August 29 – September 1, 2000 Proceedings. Springer. ISBN 978-3-540-44520-3.
  6. ^ The most powerful Russian processor will be 32-core and made according to the technorm 7 nm

External links[edit]