Multi-master bus

From Wikipedia, the free encyclopedia

A multi-master bus is a computer bus in which there are multiple bus master nodes present on the bus.[1] This is used when multiple nodes on the bus must initiate transfer. For example, direct memory access (DMA) is used to transfer data between peripherals and memory without the need to use the central processing unit (CPU).

Some buses like I²C use multi-mastering inherently to allow any node to initiate a transfer with another node.[2]

References[edit]

  1. ^ Wang, Yinglin; Li, Tianrui (2012-02-02). Practical Applications of Intelligent Systems: Proceedings of the Sixth International Conference on Intelligent Systems and Knowledge Engineering, Shanghai, China, Dec 2011 (ISKE 2011). Springer Science & Business Media. ISBN 978-3-642-25658-5.
  2. ^ Bindal, Ahmet (2017-08-02). Fundamentals of Computer Architecture and Design. Springer. p. 154. ISBN 978-3-319-25811-9.