Z80182
The Zilog Z80182 is an enhanced, faster version of the older Z80 and is part of the Z180 microprocessor family. It's nicknamed the Zilog Intelligent Peripheral Controller (ZIP).
It has the following features:
- Two ESCC (enhanced serial channel controller) channels with 32-bit CRC
- Two UART (serial controller interface) channels
- Internal configurable address decoder
- Three PIA (Programmable I/O adapter) ports
- Two 16-bit timers
- One CSIO (Clocked Serial Input/output) channel
- One MMU (Memory management Unit) that expands the addressing range to 20 bits
- Wait state generator
- Two DMA channels
- Interrupt controller
- Extended instructions
- 16550 MIMIC interface
- Crystal oscillator
It's also fully static (the clock can be halted and no data in the registers will be lost) and has a low EMI option that reduces the slew rate of the outputs.
The Z80182 can operate at 33 MHz with an external oscillator for 5 volt operation or 20 MHz using the internal oscillator for 3.3 volt operation.[1]
Notes[edit]
 | This article includes a list of general references, but it lacks sufficient corresponding inline citations. (July 2009) |
- ^ "CPU Control Register". Z80182/Z8L182 Zilog Intelligent Peripheral Controller Product Specification. San Jose, California: Zilog. 2009-02-05. p. 3–48.
References[edit]
- "Z80182/Z8L182 Zilog Intelligent Peripheral Controller Product Specification" (PDF). San Jose, California: Zilog. 2009-02-05. Retrieved 2009-07-10.
- "Z80182/Z8L182 Intelligent Peripheral Controller Reference Manual" (PDF). San Jose, California: Zilog. 2009-02-05. Retrieved 2009-07-10.
- "Z8018x MPU Family User Manual" (PDF). San Jose, California: Zilog. 2009-02-05. Retrieved 2009-07-10.
 | This microcomputer- or microprocessor-related article is a stub. You can help Wikipedia by expanding it. |