Talk:AES instruction set

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Software supporting AES instruction set[edit]

Would anyone object to limiting software to software libraries? It seems like the list will grow until it is unmanageable if the only restriction is software. If the restriction is software libraries, the growth will be checked, and it will provide useful information for programmers who need a list of supporting libraries.

JW Noloader (talk) 02:00, 13 August 2010 (UTC)[reply]

Windows' Bitlocker should also be added to the list. 72.80.29.25 (talk) 14:55, 12 July 2011 (UTC)[reply]

I don't see any evidence that [Oracle] Java 7 HotSpot supports AES. Java 8 appears to, based on the appearance of new "intrinsics" and my own performance testing. twimoki (talk) 03:21, 24 June 2013 (UTC)[reply]

Security[edit]

There is no discussion about security implications. In the non-hw assisted case the CPU has a hard time figuring out what is your key. In this case, you're essentially giving a black box your key, AND telling it the semantics too "this here is my key".

How can you be sure there isn't (for example) a built-in SRAM cache which stores the most-recently used 500 keys?

94.254.76.147 (talk) 09:37, 2 June 2011 (UTC)[reply]

Comparison with a Pentium 4[edit]

I think this comparison is...questionable. Especially considering, that a Pentium 4 is well known to have the worst IPC of its generation, and was out of date by three generations by the time AES-NI became available, including one major and one minor architectural change. So looking at the cycles per byte of the worst offender of long pipelines, with the Netburst architecture, and the cycles per byte using optimized, dedicated logic is very strange. A comparison with a pure software implementation on the same platform would be interesting, or maybe with a previous platform, but a comparison with a P4 appears rather useless. 193.49.124.107 (talk) 08:27, 17 August 2011 (UTC)[reply]

Evaluation of the Carryless multiplication[edit]

The carryless multiplication instruction is also discussed here: http://ieeexplore.ieee.org/xpls/abs_all.jsp?arnumber=4358294&tag=1 and here: http://vega.dii.unisi.it/~giorgi/papers/Branovic03a.pdf — Preceding unsigned comment added by Robgiorgi (talk • contribs) 10:53, 8 June 2014 (UTC)[reply]

Deleting the "Supporting software" section[edit]

I think this is a good idea. Most mature crypto programs with performance-relevance support AES-NI these days. The existing list is needlessly huge and includes some little-used stuff. It seems like a good place for a vendor of a lesser-used product to slip in a free advertisement.

Objections? Risc64 (talk) 17:49, 30 December 2015 (UTC)[reply]

I agree --208.87.223.18 (talk) 01:43, 12 August 2018 (UTC)[reply]

Deleting the "Supporting x86 CPUs" section[edit]

This section has nothing to do w/ AES instructions as they are using specialized hardware that requires drivers. They should be moved to a new page talking about cryptography accelerators (such as HiFn cards).

--208.87.223.18 (talk) 01:41, 12 August 2018 (UTC)[reply]

There's already a Cryptographic accelerator page that needs expansion but it covers more than AES. I disagree that the "Supporting x86 CPUs" section should be moved there, rather this page should be repurposed to talk about AES accelation in general. PeterJeremy (talk) 08:52, 3 May 2021 (UTC)[reply]

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VeraCrypt AES-NI support[edit]

Consider adding VeraCrypt to the list of supporting software? [1] — Preceding unsigned comment added by MetalFusion81 (talk • contribs) 14:19, 23 March 2019 (UTC)[reply]

Done. I'm surprised it was missing. peterl (talk) 19:43, 23 March 2019 (UTC)[reply]
Thank you. MetalFusion81 (talk) 01:25, 24 March 2019 (UTC)[reply]

AES acceleration via instructions vs co-processors[edit]

This page covers accelerated AES implementations via a mixture of instructions that directly implement parts of AES (eg x86 AES-NI and ARMv8 Crypto Extension) and integrated crypto engines (VIA Padlock, RISC-V, older ARMs etc). There's a reference above that suggests getting rid of the "Supporting x86 CPUs" section on the basis that the integrated crypto engines are no different to HiFn cards, and that could equally well apply to many other parts of the hardware listed on this page.

I agree that there's a distinction between implementing AES via (eg) the AES-NI or using the VIA Padlock but I don't agree that just throwing out the latter is the correct approach. There's already a Cryptographic accelerator page, but it discusses crypto acceleration in general, whereas this page is specific to AES. I therefore suggest that this page be renamed to AES acceleration (swapping the current redirection direction) and reworded to cover both integrated instruction support and co-processor support for AES.

PeterJeremy (talk) 08:45, 3 May 2021 (UTC)[reply]

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