Talk:Write combining

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Talk[edit]

This page is wrong when it says that write combining cannot be used for general memory access because of weak ordering.

It would be correct to say that naive write combining cannot be used, or that making write combining behave in a non-weak ordered fashion requires more complexity.

For example, the Intel P6 used write combining for ordinary WB memory in the special circumstance of "fast strings", REP MOVS and REP STOS. Or perhaps that is what the author would consider special purpose.

Another technique consistent with truly general purpose memory is what I call "left to right write combining": you combine so long as successive writes are exactly adjacent to and monotonically increasing within a cache line. If they are not "left to right", you evict the partial line. AMD's processors have had this for many years.

See http://semipublic.comp-arch.net/wiki/Write_combining#Left_to_right_write_combining

2600:1010:B024:ADA5:793D:DF5:D705:F191 (talk) 06:00, 6 November 2012 (UTC) Andy Glew[reply]