Talk:Dennard scaling

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Relation between power density, performance, clock rate, voltage, and current[edit]

From my understanding, I do not see a direct relation between power density and performance. I guess, if power density stays constant, one can increase the clock speed and get better performance per watt. It is not clear to me, however, how this relation looks like in detail. --NeoUrfahraner (talk) 09:00, 6 August 2015 (UTC)[reply]

This article isn't totally correct...Dennard scaling isn't just another Moore's law derivative that measures power, Dennard specified the tweaks in transistor design (doping, dielectric capacitance, etc.) that need to be made to change the channel length of a MOSFET (there are really two Dennard papers on this, the constant field paper is the more famous one). There is a very specific relationship between the scaling parameters which we should get into in the article.--editfest (talk) 1 Dec 2016 (UTC)

Yes please. - Rod57 (talk) 09:33, 11 June 2018 (UTC)[reply]

I agree that the article is not clear. However, there is also one place where the article is actually misleading/false. The section Derivation correctly concludes that after Dennard scaling, the original circuit runs at 1.4x the frequency and 0.5x the power. For workloads/circuits where performance directly correlates with frequency, this means the performance-per-watt improved by a factor of 2.8x. This is not directly mentioned and that's okay. However, the last sentence of this section mentions that power consumption remains unchanged after doubling the number of transistors. While this is true, it should not be mentioned here as it implicitly invokes Moore's Law (Doubling of transistor density per unit area). It should be dealt with in the next section which considers the intersection of Moore's Law with Dennard scaling.

That next section is titled Relation with Moore's law and computing performance. It claims that [Moore's Law] "Combined with Dennard scaling, this means that performance per watt grows at this same rate, doubling about every two years." This is the misleading/false statement. As we have seen above, for workloads/circuits where performance is directly proportional to frequency, one generation of Dennard scaling by a 0.7x factor results in 2.8x perf-per-watt. Now if we assume that performance of some workload/circuit is directly proportional to the transistor count, then Moore's Law predicts that after one generation, transistor count will double and thus performance will double. But at the same time, power consumption will also double due to the doubled transistor count. Thus Moore's Law changes both perf and watts equally by 2x, leaving perf-per-watt completely unaffected. Moore's Law merely says that the transistor count within an integrated circuit will double every generation. If this doubling is achieved by Dennard scaling with a 0.7x factor, then the perf-per-watt improvement per Moore's Law generation would be 2.8x. If a single generation of Moore's Law is 2 years, then the perf-per-watt improvement is 2.8x every 2 years, and NOT "doubling about every 2 years", as this section incorrectly states.

Now, in practice, the reason we used to get 2x every 2 years and 2.8x every 2 years is that all the scaling we have talked about so far is assuming that transistor X, Y, Z and voltages all scaled together by the same 0.7x factor. In practice, this theoretically ideal scaling could not be achieved (e.g. X and Y scale differently from transistor Z -- where Z is the gate silicon dioxide thickness). Voltages also could not be scaled ideally. Thus, in practice, perf-per-watt increased far slower than 2.8x, and 2.0x was a good approximation in regards to what was actually achieved. Another important reason 2.8x could never be achieved is that performance is rarely, if ever, directly proportional to frequency. e.g. doubling a CPU's frequency does not double its performance because the DRAM/storage subsystem did not double in speed as DRAM/storage does not follow Moore's Law nor Dennard scaling.

Here is a reference that explains Dennard constant-field scaling a little more in detail: https://gab.wallawalla.edu/~curt.nelson/engr434/lecture/15%20scaling%20and%20economics%204th.pdf

Essentially the same derivation can be found in classic VLSI textbooks such as Eshraghian and Weste.

If no objections, I will remove the misleading statement in the second section and clarify the first section a little bit.

162.198.69.146 (talk) 07:15, 20 October 2019 (UTC)[reply]

This article needs improvements[edit]

There is no examples, the laws are simply spoken — Preceding unsigned comment added by 46.126.193.12 (talk) 02:53, 1 January 2018 (UTC)[reply]

How does this relate to Constant Field Scaling[edit]

Tunnel_field-effect_transistor talks about Constant field scaling. I'm going to redirect that to Dennard scaling based on a comment above. - Rod57 (talk) 18:41, 10 June 2018 (UTC)[reply]