Talk:Intel 8008

0.5 MHz?

I was pretty sure that the base clock for the 8008 was 1 MHz, and 1.6 MHz for the 8008-1. Unfortunately, my original documentation is in a packing case somewhere in the shed. Can anybody confirm?

In any case, just stating the clock is misleading. The fastest instructions on the 8008 took 20μs, and the slowest were 44μs. I'm pretty sure that this was the number of clock cycles. Groogle (talk) 01:48, 31 December 2007 (UTC)

My guess (I'm 42) is that your clock frequency numbers are the Ø₁ and Ø₂ two-phase clock supplied to the 8008, while the numbers in the article are the SYNC clock output from the 8008. Still, I'm not sure how 5T and 11T respectively (from the data sheet) would end up as 20 and 44 [some unit], as this is a factor of four, not two as one would have expected. Perhaps your "development system" used a single-phase clock at twice the frequency in order to generate the two-phase clock for the 8008 (which is then in turn divided by 2 into T-states by the 8008)? That would explain it. HenkeB (talk) 16:50, 13 January 2008 (UTC)

In the two-phase clock generator that I used in the nine-chip microcomputer shown on: http://donbot.com/MicrocomputerDesign/First_Edition/F292.html I used a 1.6 MHz clock to feed the flip-flop. Obviously the output of the flip-flop is half of the input frequency. The actual full cycle frequency was only 500 kHz for the 8008 and 800 kHz for the 8008-1. Donald P. Martin —Preceding unsigned comment added by 76.29.92.147 (talk) 16:09, 11 August 2009 (UTC)

Instruction execution time

Was 8008 the first microprocessor ever to breach the microsecond barrier for execution of a singular machine instruction?Anwar (talk) 19:25, 7 May 2008 (UTC)

No. HenkeB (talk) 00:18, 8 May 2008 (UTC)

Similarity with x86

The article says:

The subsequent Intel 8080 and 8085 CPUs were also heavily based on the same basic design; even the x86 architecture (originally a non-strict extension of the 8085) loosely resembles the original Datapoint 2200 design (every instruction of the 8008's instruction set has a direct equivalent in the 8080's larger instruction set and Intel Core 2's even larger instruction set, although the opcode values are different in all three).

However, the 8008 had conditional call instructions, but x86 does not. Can someone familiar with the 8008, 8080, and 8086 correct this sentence? 140.180.175.90 (talk) 02:35, 19 November 2009 (UTC)

"the 8008 had conditional call instructions". This is correct. Actually the original architectural design (by Vic Poor and Harry Pyle) as provided by Datapoint to Intel (and TI) did not have conditional call and return and also, was BigEndian!

It was an Intel designer (sorry I don't know who) who requested these two changes. Both, to lower the transistor count of the 8008. Making the machine Little Endian meant the 8 byte LSB of an address did not have to be stored internally under various execution situations, but only a carry flag. Making conditional call and return meant that all PC modifying instructions were conditional, saving transistors.

Aside: Datapoint internally took great advantage of conditional call and return to nicely optimize their assembly code. EX: A standard was developed that if a subroutine returned with the carry flag set, there was an error. Tests would then be written so that carry is set on error, and immediately follow this logic with the "RTC" instruction (Return True Carry), a very space & time optimal sequence. 131.107.0.73 (talk) 17:16, 19 May 2011 (UTC)HenriS

Datapoint screen like IBM 029?

used a video screen shaped to be the same aspect ratio as the IBM 029 punched card terminal.

Interesting, because neither the 029 nor the follow-on 129 had a screen at all. Honest. —Preceding unsigned comment added by MaggieL (talk • contribs) 20:53, 2 August 2010 (UTC)

The sentence being referred to "The case, ... an IBM punch card." (not punched card) can be taken, by location and context, to refer to the Datapoint 3300 but it does not. On the other hand, it is an accurate statement about the 2200! This may need to be clarified.

(said another way) The comment was not referring to the 029 card punch machine but to the card itself. In either case, it is incorrect. The Datapoint 3300 had a 25 line display, very similar to the 4:3 size ratio of standard monitors (pre wide-screen). On the other hand, the display of the Datapoint 2200 was only 12 lines by 80 characters. This is sized closer to a 'punch card' (13 punch rows by 80 columns) and may be where the (incorrect) idea came from. 131.107.0.73 (talk) 16:58, 19 May 2011 (UTC)HenriS

Who's first? General Mills or Pillsbury Foods

The article contains "with their first sale to General Mills on May 25, 1970". To my understanding, the first customer was actually "Pillsbury Foods" as mentioned in the Datapoint 2200 article. This was related to me by Jonathan Schmidt, Datapoint's VP of R&D.

As I was told, the original intent of the 8008/2200 processor was as a terminal emulator, not a general purpose computer. I.E. it was to be used to perform communication protocol handling. That way, the same machine could be used to communicate with IBM, DEC, Univac, GE, Burroughs, etc. computers which used different control codes.

Pilsbury, when they got their first machines, immediately started programming them as personal business computers. Seeing this, Datapoint decided to rewrite their history and say that was their intent all along. They then proceeded to create related software a DOS, BASIC, DATABUS, etc.

131.107.0.73 (talk) 17:41, 19 May 2011 (UTC)HenriS

Emulator / Assembler

I wrote a small free open-source Intel 8008 emulator and assembler to celebrate its 40th anniversay! :) 79.227.171.133 (talk) 00:01, 9 April 2012 (UTC)

The actual source to a later product, the Datapoint 1800 & 3800 is archived at Datapoint 1800 & 3800 firmware 73.193.100.92 (talk) 06:54, 27 February 2016 (UTC) - HenriS

T-cycles

This Intel 8008 article mentions T-states. The Zilog Z80 article mentions T-cycles. What are T-states? Are T-cycles the same thing, and if not, what are they? Are T-cycles something only relevant to the Zilog Z80, and T-states only relevant to the Intel 8008, or are they something relevant to many different CPU designs and so should be mentioned and defined in the CPU design article? --DavidCary (talk) 05:23, 9 March 2014 (UTC)

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IBM Basic assembly language

This article has a link to IBM Basic assembly language, which is an assembler for IBM S/360 systems. I don't see why one would put such an assembler into ROM for an 8008 system. Gah4 (talk) 01:14, 17 May 2018 (UTC)

I looked up the citation on that one, and that source itself linked to a page at the Digibarn. The details turn out to be quite peculiar, but unfortunately just a little vague. It sounds like the ROM of the Sacramento State 8008 system was written to interpret already assembled programs written in IBM Basic Assembly Language, because that was the language used by Sacramento State for their students' system-software programming assignments, and they already had a large collection of such student-written programs. Also, the guy working on the 8008 project had previously helped to create ROM-based implementations of various minicomputers, so the task was something he was already used to. What I'm not quite clear on is whether the ROM of this 8008 system had an interpreter of binary System/360 instructions or of human-readable BAL code; the former sounds much more plausible. --Colin Douglas Howell (talk) 11:07, 18 May 2018 (UTC)

There was no IBM 360 BAL anywhere near the i8008, at least in its CTC/Datapoint incarnation. Their instruction sets are quite different and the i8008 was very slow. To make it an interpreter would be painful. The Datapoint machines (2200, 5500, 6600, 3800, etc.) had a 4K ROM for its BIOS, if you will. This ROM contained boot code, some basic I/O level operations including to display, and a minimal debugger. The debugger should be accessed directly from a specific 3-key sequence on the attached keyboard. -- HenriS — Preceding unsigned comment added by SochaLogical (talk • contribs) 07:54, 5 March 2019 (UTC)

succession

There seems to be recent removal of the 8008 being a successor to the 4004. As well as I know, much of the design of the chips was done by the same people. The instruction sets might have little or no connection, but the internal processor design might. Gah4 (talk) 01:22, 18 May 2018 (UTC)

@Gah4: That was me. I suppose it's possible to argue about this, depending on your point of view, but I believe my judgment is a sound one for most purposes. The 4004 and 8008 might indeed be similar in the low-level details of how their transistors were designed and how their circuits were laid out, because they were made with the same silicon-gate PMOS semiconductor technology at the same time, with the same people responsible for making a working semiconductor implementation. But that's not the way the "successor" field of the CPU infobox is normally used, and I think calling the 8008 a "successor" to the 4004 is fundamentally misleading to people who don't already know the details.

Most people who are interested in microprocessors, even highly technical people, tend to think at a much higher level than the nitty-gritty of transistor design and semiconductor layout. They think of things like the instruction set architecture, the bus architecture, or the internal microarchitecture: instruction fetcher and decoder, ALU, register set, internal buses, execution cycle details. In all of these respects, the 8008 is extremely different from the 4004, because it's a fundamentally different architecture, a clean-sheet design by a separate company that Intel was asked to implement in microprocessor form.

Is this explanation acceptable? --Colin Douglas Howell (talk) 10:39, 18 May 2018 (UTC)

I pretty much never look at the inbox, so hadn't thought of that one. As well as I remember, and without going back to look, Intel made significant differences at lower levels, and even not so low. For one, I believe they changed from big-endian to little-endian for the 8008. Even implementing two very different external architectures, the internal details tend to follow those or the designer. Some high-level details naturally change going from 4 to 8 bits. In both, the bus architecture was pretty limited by the pin count. I suppose I am not against keeping them out of the infobox, but I suspect that some details are more similar than you give them credit gor. Gah4 (talk) 12:54, 18 May 2018 (UTC)

The DEC Alpha is the logical successor to VAX, pretty much what it says in the first sentence, though not in the infobox for either. It is the successor to run VMS, and convert existing VMS installations, so even higher level than you indicate. I tend to think of successor links in term of, "...if you are interested in this, you might also be interested in ..." terms, there being a few different reasons why that might be true. Gah4 (talk) 15:40, 18 May 2018 (UTC)

If I recall correctly, the 8008 nee 1201 design preceded the 4004. Shima was the dominant architect of the 4004 and had nothing to do with the 8008. Shima was brought in to do the 8080. Glrx (talk) 16:44, 10 June 2018 (UTC)

If the 'successor' definition is placed on the CTC1201 / i8808 then that same same successor designation should be placed on the AMD design for their 64 bit X86 architecture. You can still see the 8008's architectural influence on the X64. On the other hand, you can not see the 4004's influence. HenriS —Preceding undated comment added 08:10, 5 March 2019 (UTC)

Image Caption

The image caption in the article reads "An Intel C8008-1 processor variant with purple ceramic, a gold heat spreader, and gold pins."

That is not a "heat spreader", that is just the lid of the ceramic DIP package. In contrast to much later ceramic packages as the PGA package used for the 80386 processor, ceramic DIP packages were assembled from the top, that is, the silicon chip is glued inside the package's cavity, the bonding wires are attached and —-after a functional test—- the lid is soldered on the package. That's all done from the top; there's air (or maybe an inertial gas) between the chip and the lid, thus no thermal coupling, not improving any heat transfer.

On the '386 in it's PGA package things were slightly changed, the cavity in which the chip is glued faces the bottom, thus the lid does too, but still no heat spreader.

A heat spreader was introduced with the original "pentium" processor, where there's a lid on the bottom and a thick metal plate on the top. This is thermically coupled to the chip and hence a true "heat spreader".

But the lid on this 8008 ceramic package is not a heat spreader. --93.209.94.35 (talk) 04:51, 28 May 2020 (UTC)

Good point, I'll correct this. Drahtlos (talk) 13:50, 28 May 2020 (UTC)

Lead section too focused on CTC

I'm a big fan of the Datapoint 2200, but the current lead section spends more time talking about CTC than the 8008 chip. I think it needs some rewriting to satisfy WP:LEAD and WP:NPOV. For instance, CTC designed the architecture; they did not design the chip. KenShirriff (talk) 16:18, 8 April 2023 (UTC)

After reading this comment today, I found that the lead still focused too much on historical details regarding CTC. For example, the lead focused too much on an early failure and did not address any successes or legacy at all; for example, the 8088's influence on x86 architecture. I edited the lead with an eye to removing unnecessary detail, but am hoping that others can take the next step and provide more neutral details for our general readership. And looking past the lead, the History section definitely does not need to include so many details about CTC history. CTC has its own article where those details belong, and I'm going take a first stab at editing the History section here accordingly. Orange Suede Sofa (talk) 01:30, 31 January 2024 (UTC)