Talk:Magnetoresistive RAM

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"fab"[edit]

Reading the section "Comparison with other systems: Overall" was weird because of the use of the word "fab" as an abbreviation for "semiconductor fabrication plant." I'm guessing that "fab" is an industry slang word and that the person who wrote the passage is from the industry, but... my first thought when reading the word was "fabulous," not "fabrication plant." So, for others who are not in the fabrication industry, the word choice should be less casual and more encyclopedic. If not that, then at least define "fab" in the article and gradually increase the frequency of its use so newcomers aren't distracted by it. --Humanist Geek (talk) 04:10, 23 May 2010 (UTC)[reply]

"faster than SRAM"[edit]

Is it really supposed to be faster than the SRAM used for CPU caches? The main part of the article only mentions that it should be denser than SRAM. Amaurea 17:43, 19 December 2005 (UTC)[reply]

Hmm, could do with scientific references here to justify these statements. A quick google gives me an article from this April in Science [1], which says "IBM has obtained read times of 3ns in 1kb research memories, Freescale has demonstrated a 25-ns cycle time for its 4-Mb MRAM, and Cypress Semiconductor is targeting a 70-ns cycle time for its 256-kb MRAM." The article in Science states that there is recent research which indicates that much faster MRAM may be produced in future. So I think it depends on whether you're talking about the situation right now (I think 10ns cycle time SRAM is available currently), or what the potential of the technology is.

Freescale Semiconductor data sheet for MR2A16A, see www.freescale.com and enter Part Number MR2A16A.
Cypress Semiconductor datasheet for CY9C62256, see www.chipcatalog.com/Cypress/CY9C62256-70SC.htm.

Average Earthman 18:49, 19 December 2005 (UTC)[reply]

i beleive the "faster than SRAM" was a misquote by wired.com from IBM, who quoted it as being 6x faster than DRAM.. (corrected)

mrsci[edit]

was this page taken from www.mrsci.com/Computer-Memory/MRAM.php , or did they steal it from wikipedia?? - 2nd feb —The preceding unsigned comment was added by 137.205.148.8 (talk • contribs) 20:26, 5 February 2006 (UTC)

They copied it from Wikipedia. Note that Wikipedia is not copyrighted. Average Earthman 20:45, 5 February 2006 (UTC)[reply]
Well, it is under the GFDL, so they should give credit to Wikipedia and mention the license, ideally. I know some people here feel quite strongly about that (I don't though), and we have a page for listing noncompliant sites. mrsci does not seem compliant, and actually claims all rights for itself. Amaurea 10:02, 7 February 2006 (UTC)[reply]

needs expansion of info[edit]

Note: the description section needs to be expanded to include all the various types of MRAM. The comparison section needs to add other forms of memory such as FRAM. Earthsound 22:30, 3 January 2006 (UTC)[reply]

history?[edit]

so..what happened between 1989 and 2000?

They were all on vacation, srsly. 128.238.79.102 (talk) 20:31, 21 September 2009 (UTC)[reply]

http://en.wikipedia.org/w/index.php?title=MRAM&oldid=63136685#Current_History

—The preceding unsigned comment was added by 00:03, 11 July 2006 (talk • contribs) 71.103.116.182.


I'm pretty sure that Gary Prinz of the Naval Research Lab actually wrote the patent for MRAM in the 90s. The article reads like it is written by someonefrom IBM...pretty typical to leave off the accomplishments of others.

The discovery of the GMR effect is listed twice:

  • 1984 – GMR Effect discovered
  • 1988 – European scientists (Albert Fert and Peter Grünberg) discovered the "giant magnetoresistive effect" in thin-film structures.

Someone should check this... --anon — Preceding unsigned comment added by 2A02:908:1060:2F00:0:0:0:1 (talk) 19:17, 10 August 2017 (UTC)[reply]

Core memory[edit]

Sounds like MRAM is a much-refined reincarnation of the old core memory used back in 1401 and 1620 days. Jm546 00:12, 27 July 2006 (UTC)[reply]

No more so than a hard drive – that's magnetic too. Note that MRAM, unlike core, has a non-destructive read. This leads to overall operation considerably different than core. On the other hand, FeRAM uses ferromagnetic elements, but does operate like core. There's no simple comparison here. Maury 22:09, 27 July 2006 (UTC)[reply]

Just found an article interesting regarding the history of MRAM[edit]

http://www.frost.com/prod/servlet/press-release.pag?docid=38856487

which recognizes "Northern Lights Semiconductor Corporation (NLSC)" for excellence research in MRAM. I heard NLSC has successufully developped 64Kbits MRAM since long time ago...say 2000..and demo that in many places. Now they have 1M&16Mbits design. Any one knows about this company? —The preceding unsigned comment was added by 63.224.13.94 (talk) 16:18, 31 January 2007 (UTC).[reply]

MRAM vs DRAM[edit]

The article seems to cover the issue of DRAM vs MRAM a lot. But realisticly, is MRAM really aiming to compete with DRAM? It seems to me that being non-volatile, it's more aiming to compete against other non volatile memory chips like PRAM, FeRAM and flash memory (NOR and NAND). Perhaps I'm wrong but it seems more likely that some other volatile memory chip will replace DRAM. Also, why is there no coverage of MRAM vs PRAM & FeRAM. As one of the AFAIK more promising NV rams in development seems to be it's more significant then MRAM vs DRAM. Also does it strike anyone else that parta are too duplicative. E.g. "Since the capacitors used in DRAM lose their charge over time, memory assemblies using them must periodically refresh all the cells in their chips approximately 1000 times a second, reading each one and re-writing its contents. This demands a constant power supply, which is why DRAM loses its memory when power is turned off on the computer." isn't this just telling us what volatile memory is? Wouldn't it be better to just say MRAM is NV and DRAM is V? Nil Einne (talk) 19:05, 8 December 2007 (UTC)[reply]

External magnetic field[edit]

What about resistance of MRAM to external magnetic field? Do the MRAM chips need protection from such fields, similar to floppy disks or hard drives? I think the article should contain some info about this. Ghalas (talk) 09:00, 10 June 2008 (UTC)[reply]

No. The shape antisotropy of these devices is so high that no magnet that the average person would have is capable of switching these devices. The magnetic field generated by a wire fall off by 1/r^2, therefore the only reason that they can be switched using external fields is because the fields are generated very close to the free layer. —Preceding unsigned comment added by 24.131.149.229 (talk) 04:21, 16 May 2009 (UTC)[reply]

I have a bachelor's thesis from my university which did actual measurements of MRAM resistance to external magnetic field and it showed that at 22mT MRAM start to generate errors, so a typical Neodymium magnet should be able to alter memory inside MRAM. The actual chip that was tested is MR2A16A. The research was done in 2009, so things might have changed, however I doubt that. Contact me if you need more info giedrius.medzevicius et gmail dot com. — Preceding unsigned comment added by 193.219.94.30 (talk) 10:21, 18 May 2013 (UTC)[reply]

MRAM has nothing to do with memristors[edit]

An editor recently added a line about this to the lead based on [2]. If you click the link to the original EEtimes article this claim is not in there at all. I have no clue what's going on here with the Guardian, but this just doesn't make any sense. a13ean (talk) 15:18, 15 December 2011 (UTC)[reply]

Hi, first timer here :) it seems like the only person who claims MRAMs are memristors is Stan Williams from HP here, and the article he cited does not mention anything about MRAMs. Both devices perform different functions and putting these two very different devices together is at best confusing. L02T (talk) 07:58, 30 October 2012 (UTC)[reply]

Requested move[edit]

The following discussion is an archived discussion of a requested move. Please do not modify it. Subsequent comments should be made in a new section on the talk page. No further edits should be made to this section.

The result of the move request was: moved to Magnetoresistive random-access memory. Favonian (talk) 10:39, 17 February 2012 (UTC)[reply]

Magnetoresistive random access memory → Magnetoresistive random-access memory – Other types of random-access memory have hyphens in their title, if they do not use the acronym RAM: Dynamic random-access memory and Static random-access memory. --Wbm1058 (talk) 01:08, 10 February 2012 (UTC)[reply]

  • Support – normal hyphenation convention clarifies to meaning to English readers. Dicklyon (talk) 16:22, 10 February 2012 (UTC)[reply]
  • Support - makes sense, and there will still be a redirect. a13ean (talk) 21:09, 10 February 2012 (UTC)[reply]
The above discussion is preserved as an archive of a requested move. Please do not modify it. Subsequent comments should be made in a new section on this talk page. No further edits should be made to this section.

language needs to be time-independent[edit]

MRAM is physically similar to DRAM in makeup, although often does not require a transistor for the write operation. However, as mentioned above, the most basic MRAM cell suffers from the half-select problem, which limits cell sizes to around 180 nm or more. Toggle-mode MRAM offers a much smaller size before this becomes a problem, apparently around 90 nm,[10] the same size as most current DRAM products. To be worth putting into wide production, however, it is generally believed that MRAM will have to move to the 65 nm size of the most advanced memory devices, which will require the use of STT.

This was a good write up in 2006, but the data is now far from current. I suggest improving the page by specifying the year involved when claims about what is "current" are being made. Such as this rewrite for that particular paragraph:

MRAM is physically similar to DRAM in makeup, although often does not require a transistor for the write operation. However, as mentioned above, the most basic MRAM cell suffers from the half-select problem, which limits cell sizes to around 180 nm or more. Toggle-mode MRAM offers a much smaller size before this becomes a problem, which in 2006 was expected to be around 90 nm,[10] the same size as most contemporary DRAM products. To allow for future growth however, it was generally believed that MRAM would have to move to 65 nm, the size of the most advanced memory devices at the time, and perhaps therefore requiring the use of STT.

This is pertinent because there are now SSDs coming to market with MRAM caches. I'm not sure if they are the STT variety. With DRAM and NAND now in the 20nm node, ahead of even intel IB processors, they obviously have pushed past 65nm with MRAM to be in the process of incorporating it in products.

--173.66.0.100 (talk) 13:10, 9 May 2012 (UTC)[reply]

MRAM v/s ReRam[edit]

Both are promising developments but the question remains which one's the future of memory Avieshek (talk) 07:45, 3 January 2014 (UTC)[reply]

From what I have heard, ReRAM is competing in the Storage to Memory Class Storage industry (Flash Memory), while MRAM is aiming for the Memory to Logic end (DRAM and SRAM).

Both are decent ideas but I think due to recent developments for 3DNAND and VNAND for Flash memory, Integrated Device Manufacturers may be unwilling to switch and develop a replacement for the existing Flash memory technologies. DRAM and SRAM may hit some power and volatility limitations with further scaling (capacitance and source drain leakage) so the non volatility of MRAM may be an attractive alternative. — Preceding unsigned comment added by 103.9.97.227 (talk) 03:14, 20 September 2016 (UTC)[reply]

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MRam errors..[edit]

Folliwng this part in the article..

" Endurance

The endurance of MRAM is affected by write current, just like retention and speed, as well as read current. When the write current is sufficiently large for speed and retention, the probability of MTJ breakdown needs to be considered.[18] If the read current/write current ratio is not small enough, read disturb becomes more likely, i.e., a read error occurs during one of the many switching cycles. The read disturb error rate is given by 1 - exp(-(tread/τ)/exp(Δ(1-(Iread /Icrit)))), where τ is the relaxation time (1 ns) and Icrit is the critical write current.[19] Higher endurance requires a sufficiently low Iread/Icrit. However, a lower Iread also reduces read speed.[20] "

The error created by MTJ 'breakdown', can be one of two things. A permanent error, or a non-permanent error, meaning that actual 'mechanical' failure, would mean a permanent faulty component, while the non-permanent version would be a read failure, that is caused by several writes after each other, which in turn will heat up the MTJ beyond it's capacity to cool down, before the curie point is reached.. (When it's written as 1 and the write circuit goes down again, and the curie point has not yet been reached, the bit will not retain it's state..) (This however is a non-permanent error mechanism.) (On the other hand, if the current is physically too high and the MTJ simply blows out, it is permanent..) The thing is, a way to check for recent writes needs to be implemented.. This can be done, by adding a single transistor. The single transistor will go down, over time, after a write has occured..(it does not get refreshed..) However if the transistor is still up, it means that a recent write has occured. When this is the case, the transistor, with it's open gate, would drop some of the power through it, meant to heat the position. This will mean less heating, and thus the curiepoint will be reached after the write.. I'm not saying that this will actually solve all problems with the MTJ's but it will help.. Also, this method will have lasting impact, because the transistor will once again be refreshed, and thus if another write occures, it will still avoid application of too much heat..

ZMacZ Furreh..

If this method proves fruitful, plz move it to the main article, as the next step in MRAM development, if that next step publication has not yet occured..

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