Talk:Semiconductor package

Electronics Mid‑importance

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Things that could be in this article[edit]

Origins - first unpackaged experimental devices, hand built experimental devices to mass production by millions
Transistor manufacturing technology interacted with case design -point contact, germanium through to glass passivated silicon devices
Objectives of a transistor package - keep out moisture, automatic assembly, mechanical protection of leads and die, low cost, heat dissipation, wave soldering, size, pick and place,markings, light sensitivity, oxidation, high frequency, high power
Package problems - particles, moisture, light (and why plastic transistors are black), corrosion, cracking, delamination, broken bond wires, toxic beryllium oxide
Historical device packages - GE top hat, see http://semiconductormuseum.com/ Transistor Museum, metal tubes, glass headers, derivation from miniature lamps, metal cases, permeable plastics, passivated devices tolerate non-hermectic packages
Attaching the chip to the package - solder forms another junction
Wire bonding - hand placed wires in early devices , different bond types, automation
Lead frames
Materials: ceramics,glass, plastics, Kovar, wire bonds, solders
Heat dissipation design
Key innovations in transistor package designs
Specialist types of packages
- High power
- High frequency, microwave
- Optical
- Rugged
- Subminiature and surface mount

Military and aerospace requirements, acceptance for COTS plastic packages
Socketed devices evolved to through-hole soldered to surface-mount soldered
Failure modes
- Particles
- Moisture
- Whiskers, electromigration
- "Purple plague"

Designation (organization), outline drawing, aprox overall dimensions, material, power dissip., and remarks

Makers of the Microchip: A Documentary History of Fairchild Semiconductor By Christophe La(c)Cuyer, Christophe Lécuyer, David C. Brock, Jay Last
Encapsulation Technologies for Electronic Applications By Haleh Ardebili, Michael Pecht
Electronic Materials Handbook: Packaging By Merrill L. Minges, ASM International. Handbook Committee

Quick JEDEC transistor package outline finder/chooser image. - A problem with the provided JEDEC transistor outline external link page is that there is no simple way to choose or identify an outline transistor package without knowing the name of the package first e.g. TO-202 TO-92 etc Eromana (talk) 19:59, 13 March 2012 (UTC)[reply]

Here is an article that discuss about Intel Unveils Industry-Leading Glass Substrates to Meet Demand for More Powerful Compute for the future semiconductor packaging technology. Rjluna2 (talk) 16:23, 18 September 2023 (UTC)[reply]